Analog Circuit Walkthrough

What they ask

The core of the analog loop is two hours split between pairs of engineers, usually one senior and one junior in the first hour and two more in the second. There is almost no theory recital. Instead I put a schematic in front of you and ask you to tell me what it does.

Typical circuits in rotation:

• A plain RC network. Tell me it is a first order low pass, where the pole sits, what the slope is past it, and what the phase does.
• A differential pair with a current mirror load, the classic five transistor OTA. Walk me through the bias point, the small signal gain, where the poles and zeros are, and what the input common mode range is.
• A two stage amplifier with compensation. Why is the compensation capacitor there, what is the unity gain bandwidth, what is your phase margin, and what happens if I double the load capacitance.
• A bandgap reference. Where does the PTAT term come from, where does the CTAT term come from, and how do you pick the ratio.

For each one I will push on the design parameters rather than the topology: input offset and where it comes from, gain bandwidth product, slew rate, stability and phase margin, PSRR, and the noise contributors.

What they look for

You reason from the circuit, not from a memorised result. The strongest candidates annotate the schematic as they talk, state the assumption before the formula (small signal, long channel, ignore body effect) and say out loud when an approximation stops being valid. Expect the conversation to drift into layout once the electrical answer is right: matching, parasitic capacitance on the critical node, and what you would do differently if this had to work over temperature.